CMOS inverter

2024-08-15T00:00:00+00:00

Introduction</h2>
After understanding the characteristics of the PMOS and NMOS components, we will now combine the two to make a CMOS inverter, as in Complementary MOS. This will allow us to make the simplest digital electronic component, an inverter. We will also study the layout of a CMOS inverter.</p>

CMOS Inverter Operation Analysis</h2>
The CMOS schematic is displayed in the figure below. The goal is to take advantage of the “opposite characteristics” of the nMOS and pMOS transistors.</p>
If the input voltage is at 0 V, the N-channel transistor is OFF and the current doesn’t go through. The P-channel transistor however is ON and its current flows freely, as the drain is connected to the source. That means we get would get the voltage of vdd!* through in the output, so 2.5 V.</p>
If the input voltage is at 2.5 V, the N-channel transistor is ON and its current flows freely, and the source get connected to drain. The P-channel transistor is OFF and its current stops. This time, the output is the difference between the ground voltage and 0 V, which is 0.</p>

CMOS Inverter Fabrication Process</h2>
To make the CMOS inverter, we need to make an N-channel in a P-type for the NMOS, and a P-channel for the in a N-type for the PMOS, using P-wells and N-wells. Poly, meaning polysilicon, is what constitutes the gate.</p>

Results</h2>

Figure 1: CMOS inverter schematics, 15/08/2024 </figcaption> </figure>

Figure 2: Pulse signal rising and falling times. 15/08/2024 </figcaption> </figure>

Figure 3: Input and output voltage values of a CMOS inverter using a pulse source between 0 and 2.5v, 15/08/2024 </figcaption> </figure>

Figure 4: Layout of a CMOS inverter, 15/08/2024 </figcaption> </figure>
Conclusions</h2>
The simulation of the CMOS respects its inverting characteristics. We can see the added propagation delay of MOS transistors in the raising and lowering times.</p>
This inverter is the simplest digital electronic component needed for modern computing. What we need next is to make a NAND gate to make the real beginning of Boolean logic through digital electronic.</p>

Using S-Edit (Schematic Entry Tool) & T-SPICE (Analog Simulation Tool)

2024-08-09T00:00:00+00:00

This is from an introductory lab to SPICE software. It allows to design and test circuits.</p>

This lab also focuses on MOS drain current vs. drain-to-source voltage depending on Vgs values. We also simulate a silicon diode and output its characteristic.</p>

This lab was really guided and simply introductory. It consisted into copying the schematics given and give it the specified parameters and then simulate.</p>

NMOS</h2>

Figure 1: NMOS </figcaption> </figure>

Figure 2: NMOS drain current vs. drain-to-source voltage depending on Vgs </figcaption> </figure>
PMOS</h2>

Figure 3: PMOS schematic </figcaption> </figure>

Figure 4: PMOS drain current vs. drain-to-source voltage depending on Vgs </figcaption> </figure>
Silicon Diode</h2>

Figure 5: Silicon diode schematics </figcaption> </figure>

Figure 6: Silicon diode characteristic </figcaption> </figure>
Conclusions</h2>
We can see the theoretical functions of the MOS transistors, with the triode region on the first values of the drain-to-source voltage, and the linear region. For the silicon diode, we can see the reversed bias and forward bias as the current (or voltage) increases.</p>

Lucien's Pro Website - SPICE

CMOS inverter

CMOS Inverter Fabrication Process</h2> To make the CMOS inverter, we need to make an N-channel in a P-type for the NMOS, and a P-channel for the in a N-type for the PMOS, using P-wells and N-wells. Poly, meaning polysilicon, is what constitutes the gate.</p>

Using S-Edit (Schematic Entry Tool) & T-SPICE (Analog Simulation Tool)

Conclusions</h2> We can see the theoretical functions of the MOS transistors, with the triode region on the first values of the drain-to-source voltage, and the linear region. For the silicon diode, we can see the reversed bias and forward bias as the current (or voltage) increases.</p>

CMOS Inverter Fabrication Process</h2>
To make the CMOS inverter, we need to make an N-channel in a P-type for the NMOS, and a P-channel for the in a N-type for the PMOS, using P-wells and N-wells. Poly, meaning polysilicon, is what constitutes the gate.</p>

Conclusions</h2>
We can see the theoretical functions of the MOS transistors, with the triode region on the first values of the drain-to-source voltage, and the linear region. For the silicon diode, we can see the reversed bias and forward bias as the current (or voltage) increases.</p>